The present invention relates to a semiconductor device and a method of the fabrication thereof, and more particularly, it relates to the structure of a passivation film in a semiconductor device such as a VLSI, and also relates to a method of forming such a passivation film.
In recent years, a semiconductor device such as a VLSI has employed a passivation film composed of a lower silicon oxide film and an upper silicon nitride film. The passivation film is formed after the formation of the transistor and wiring of the semiconductor device so as to cover them, for the purpose of preventing H.sub.2 O absorption by the transistor region of the semiconductor substrate, and also for the purpose of preventing impurities such as heavy metals from entering the transistor region.
In such a passivation film, the lower silicon oxide film serves as a buffer film for reducing the stress applied by the upper silicon nitride film, while the upper silicon nitride film prevents H.sub.2 O or heavy metals from entering the transistor region of the semiconductor substrate. In cases where a phosphorous-containing silicon oxide film (hereinafter referred to as a "PSG film") is used as the lower silicon oxide film, the PSG film functions as a gettering layer for removing alkali metals such as sodium.
An example of conventional semiconductor devices will be described below with reference to the drawings. FIG. 11 is a cross-sectional view showing the structure of a conventional semiconductor device. FIG. 12 is an enlarged cross-sectional view showing the structures of a metal interconnection 3 and a passivation film 8 of the semiconductor device.
As shown in FIG. 11, a polysilicon gate electrode 12 is formed on a semiconductor substrate 10 with a gate oxide film 11 interposed therebetween. A source region and a drain region of a MOS transistor, which are both indicated by the reference numeral 13, are also formed on the semiconductor substrate 10. On the semiconductor substrate 10, a lightly doped drain region and a LOCOS oxide film are also formed, but neither of them are shown in FIG. 11. Further on the semiconductor substrate 10, a boron- and phosphorous-containing silicon oxide film (hereinafter referred to as a "BPSG film") 14 of 700 nm in thickness, planarized by heat treatment, is provided as an interlayer insulating film. The BPSG film 14 is provided with holes which are filled with tungsten 15 to function as contacts. On the BPSG film 14, a metal interconnection 3 of an aluminum alloy having a thickness of 800 nm is formed in a desired pattern by an etching process. The metal interconnection 3 serves as wiring and also as an electrode to be used for bonding.
Further on the BPSG film 14, a passivation film 8 is formed so as to cover the metal interconnection 3. The passivation film 8 has a two-layered structure composed of a lower PSG film 1 with a thickness of 300 nm and an upper silicon nitride film 2 with a thickness of 800 nm. The passivation film 8 is provided with an opening 16 to be used for bonding.
In the fabrication of the semiconductor device having the above-described configuration, a sintering process is usually required to be carried out at a temperature of 400.degree. C. to 450.degree. C. for about 15 minutes in order to obtain ohmic contacts between the source and drain regions 13 and the metal interconnection 3, and also in order to recover the damage to the transistor caused by a dry etching process.
It has been newly found, however, that the semiconductor device having the above-described configuration involves the following problem: In the case where the width of the metal interconnection and the space between adjacent metal interconnections in the semiconductor device are narrower due to high integration and device miniaturization, breaking of the metal interconnection is very likely to arise therein after the sintering process has been carried out.
In view of the above problem, it is an object of the present invention to prevent breaking of a metal interconnection due to a sintering process which is carried out after a passivation film composed of a lower silicon oxide film and an upper silicon nitride film has been formed on the metal interconnection.